Felice Balarin
About
Felice Balarin has authored 36 papers that have received a total of 611 indexed citations.
This includes 33 papers in Hardware and Architecture, 21 papers in Computational Theory and Mathematics and 9 papers in Computer Networks and Communications. The topics of these papers are Embedded Systems Design Techniques (29 papers), Formal Methods in Verification (21 papers) and Real-Time Systems Scheduling (15 papers). Felice Balarin is often cited by papers focused on Embedded Systems Design Techniques (29 papers), Formal Methods in Verification (21 papers) and Real-Time Systems Scheduling (15 papers) and collaborates with scholars based in United States, Italy and Japan. Felice Balarin's co-authors include Harry Hsieh, Alberto Sangiovanni‐Vincentelli, Luciano Lavagno, Y. Watanabe and Xi Chen and has published in prestigious journals such as Computer, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and Formal Methods in System Design
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