J. Segura

83 papers and 584 indexed citations i.

J. Segura has authored 83 papers that have received a total of 584 indexed citations. This includes 78 papers in Electrical and Electronic Engineering, 34 papers in Hardware and Architecture and 20 papers in Biomedical Engineering. The topics of these papers are VLSI and Analog Circuit Testing (34 papers), Integrated Circuits and Semiconductor Failure Analysis (33 papers) and Low-power high-performance VLSI design (30 papers). J. Segura is often cited by papers focused on VLSI and Analog Circuit Testing (34 papers), Integrated Circuits and Semiconductor Failure Analysis (33 papers) and Low-power high-performance VLSI design (30 papers) and collaborates with scholars based in Spain, United States and Mexico. J. Segura's co-authors include S.A. Bota, Josep L. Rosselló, B. Alorda, Antonio Rubio and J. Verd and has published in prestigious journals such as PLoS ONE, Lab on a Chip and IEEE Communications Magazine