Jose Renau

47 papers and 543 indexed citations i.

Jose Renau has authored 47 papers that have received a total of 543 indexed citations. This includes 40 papers in Hardware and Architecture, 32 papers in Electrical and Electronic Engineering and 17 papers in Computer Networks and Communications. The topics of these papers are Parallel Computing and Optimization Techniques (38 papers), Low-power high-performance VLSI design (26 papers) and Embedded Systems Design Techniques (11 papers). Jose Renau is often cited by papers focused on Parallel Computing and Optimization Techniques (38 papers), Low-power high-performance VLSI design (26 papers) and Embedded Systems Design Techniques (11 papers) and collaborates with scholars based in United States, Spain and France. Jose Renau's co-authors include Ehsan K. Ardestani, Francisco J. Mesa-Martínez, Josep Torrellas, James Tuck and Michael Huang and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Lecture notes in computer science and ACM SIGPLAN Notices