K. Tamaru
About
K. Tamaru has authored 21 papers that have received a total of 360 indexed citations.
This includes 14 papers in Electrical and Electronic Engineering, 8 papers in Hardware and Architecture and 5 papers in Computer Vision and Pattern Recognition. The topics of these papers are Parallel Computing and Optimization Techniques (5 papers), Advancements in Semiconductor Devices and Circuit Design (5 papers) and Advanced Memory and Neural Computing (4 papers). K. Tamaru is often cited by papers focused on Parallel Computing and Optimization Techniques (5 papers), Advancements in Semiconductor Devices and Circuit Design (5 papers) and Advanced Memory and Neural Computing (4 papers) and collaborates with scholars based in Japan. K. Tamaru's co-authors include Hidetoshi Onodera, Yoshifumi Nishi, Mario Tokoro, Masaru Takeuchi and S. Saito and has published in prestigious journals such as IEEE Transactions on Electron Devices, Japanese Journal of Applied Physics and IEEE Journal of Solid-State Circuits
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