M. Yamashina
About
M. Yamashina has authored 31 papers that have received a total of 444 indexed citations.
This includes 25 papers in Electrical and Electronic Engineering, 13 papers in Biomedical Engineering and 9 papers in Hardware and Architecture. The topics of these papers are Low-power high-performance VLSI design (15 papers), Analog and Mixed-Signal Circuit Design (13 papers) and Advancements in PLL and VCO Technologies (11 papers). M. Yamashina is often cited by papers focused on Low-power high-performance VLSI design (15 papers), Analog and Mixed-Signal Circuit Design (13 papers) and Advancements in PLL and VCO Technologies (11 papers) and collaborates with scholars based in Japan. M. Yamashina's co-authors include Tadayoshi Enomoto, Masayuki Mizuno, H. Yamada, Toshiaki Inoue and T. Nishitani and has published in prestigious journals such as IEEE Journal on Selected Areas in Communications, Japanese Journal of Applied Physics and IEEE Journal of Solid-State Circuits
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