Željko Žilić
About
Željko Žilić has authored 107 papers that have received a total of 1.0k indexed citations.
This includes 46 papers in Hardware and Architecture, 45 papers in Electrical and Electronic Engineering and 32 papers in Computer Networks and Communications. The topics of these papers are VLSI and Analog Circuit Testing (33 papers), Embedded Systems Design Techniques (15 papers) and Formal Methods in Verification (14 papers). Željko Žilić is often cited by papers focused on VLSI and Analog Circuit Testing (33 papers), Embedded Systems Design Techniques (15 papers) and Formal Methods in Verification (14 papers) and collaborates with scholars based in Canada, China and France. Željko Žilić's co-authors include Katarzyna Radecka, Atena Roshan Fekr, Majid Janidarmian, Yu Pang and Junchao Wang and has published in prestigious journals such as IEEE Transactions on Biomedical Engineering, Sensors and IEEE Transactions on Neural Networks and Learning Systems
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