Y. Watanabe
About
Y. Watanabe has authored 18 papers that have received a total of 342 indexed citations.
This includes 16 papers in Hardware and Architecture, 12 papers in Computational Theory and Mathematics and 4 papers in Electrical and Electronic Engineering. The topics of these papers are Embedded Systems Design Techniques (11 papers), Real-Time Systems Scheduling (10 papers) and Formal Methods in Verification (9 papers). Y. Watanabe is often cited by papers focused on Embedded Systems Design Techniques (11 papers), Real-Time Systems Scheduling (10 papers) and Formal Methods in Verification (9 papers) and collaborates with scholars based in United States, Italy and Spain. Y. Watanabe's co-authors include Felice Balarin, Harry Hsieh, Luciano Lavagno, Claudio Passerone and A. Kondratyev and has published in prestigious journals such as Review of Scientific Instruments, Computer and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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